View ISL28118_7813944.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 40v precision single-supply, rail-to-rail output, low-power operational amplifiers ISL28118, isl28218 the ISL28118 and isl28218 are single and dual, low-power precision amplifiers optimized for single-supply applications. these devices feature a common mode input voltage range extending to 0.5v below the v- rail, a rail-rail differential input voltage range for use as a comparator, and rail-to-rail output voltage swing, which makes them ideal for single-supply applications where input operat ion at ground is important. these op amps feature low power, low offset voltage, and low temperature drift, making them the ideal choice for applications requiring both high dc accuracy and ac performance. these amplifiers are designed to operate over a single supply range of 3v to 40v or a split supply voltage range of +1.8v/-1.2v to 20v. the combination of precision and small footprint provides the user with outstanding value and flexibility relative to similar competitive parts. applications for these amplifiers include precision instrumentation, data acquis ition, precision power supply controls, and industrial controls. both parts are offered in 8 ld tdfn, 8 ld soic and 8 ld msop packages. all devices are offered in standard pin configurations and operate over the extended temperature range of -40c to +125c. related literature ? an1595 : isl28218soiceval1z evaluation board user?s guide features ? rail-to-rail output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mv ? below-ground (v-) input capability to -0.5v ? rail-to-rail input differential voltage range for comparator applications ? single-supply range . . . . . . . . . . . . . . . . . . . . . . . . . 3v to 40v ? low current consumption . . . . . . . . . . . . . . . . . . . . . . . 850a ? low noise voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6nv/ hz ? low noise current . . . . . . . . . . . . . . . . . . . . . . . . . . 355fa/ hz ?low input offset voltage - ISL28118 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150v max. - isl28218 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230v max. ? superb offset voltage temperature drift - ISL28118 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2v/c, max. - isl28218 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4v/c, max. ? operating temperature range. . . . . . . . . . .-40c to +125c ? no phase reversal applications ? precision instruments ? medical instrumentation ? data acquisition ? power supply control ? industrial process control figure 1. typical application: single-supply, low-side current sense amplifier figure 2. input offset voltage vs input common mode voltage, v s = 15v in- in+ r f r ref + ISL28118 +3v v- v+ r in - 10k ? r in + 10k ? - + 100k ? v ref 100k ? v out load r sense gain = 10 to 40v v os (v) input common mode voltage (v) -400 -300 -200 -100 0 100 200 300 400 -16 -15 -14 -13 13 14 15 16 -40c +25c +125c may 16, 2011 fn7532.2 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2010, 2011. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners.
ISL28118, isl28218 2 fn7532.2 may 16, 2011 pin configurations ISL28118 (8 ld tdfn) top view ISL28118 (8 ld soic, 8 ld msop) top view isl28218 (8 ld tdfn) top view isl28218 (8 ld soic, 8 ld msop) top view 2 3 4 1 7 6 5 8 nc -in +in v - nc v + vout nc + - pd nc -in +in v - 1 2 3 4 8 7 6 5 nc v + vout nc + - 2 3 4 1 7 6 5 8 vout_a -in_a +in_a v - v + vout_b -in_b +in_b + - + - pd vout_a -in_a +in_a v - 1 2 3 4 8 7 6 5 v + vout _ b -in_b +in_b + - +- pin descriptions ISL28118 (8 ld tdfn) ISL28118 (8 ld soic, msop) isl28218 (8 ld tdfn) isl28218 (8 ld soic, msop) pin name equivalent circuit description 3 3 3 3 +in_a 1 amplifier a non-inverting input 2 2 2 2 -in_a 1 amplifier a inverting input 6611vout_a2amplifier a output 4 4 4 4 v- 3 negative power supply 5 5 +in_b 1 amplifier b non-inverting input 6 6 -in_b 1 amplifier b inverting input 77vout_b2amplifier b output 7 7 8 8 v+ 3 positive power supply 1, 5, 8 1, 5, 8 - - nc - no connect pad pad pad thermal pad is electrically isolated from active circuitry. pad can float, connect to ground, or connect to a potential source that is free from signals or noise sources. v + v - out circuit 2 circuit 1 v + v - circuit 3 in- v + v - in + capacitively triggered esd clamp
ISL28118, isl28218 3 fn7532.2 may 16, 2011 ordering information part number (notes 2, 3) part marking temperature range (c) package (pb-free) pkg. dwg. # ISL28118fbz (note 1) 28118 fbz -40 to +125 8 ld soic m8.15e coming soon ISL28118frtz (note 1) 118z -40 to +125 8 ld tdfn l8.3x3a ISL28118fuz (note 1) 8118z -40 to +125 8 ld msop m8.118 isl28218fbz (note 1) 28218 fbz -40 to +125 8 ld soic m8.15e coming soon isl28218frtz 218z -40 to +125 8 ld tdfn l8.3x3a coming soon isl28218fuz 8218z -40 to +125 8 ld msop m8.118 isl28218soiceval1z evaluation board notes: 1. add ?-t*? suffix for tape and reel. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ spec ial pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish , which is rohs compliant and compatible wi th both snpb and pb-free soldering opera tions). intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jed ec j std-020. 3. for moisture sensitivity level (msl), please see device information pages for ISL28118 , isl28218 . for more information on msl, please see technical brief tb363 .
ISL28118, isl28218 4 fn7532.2 may 16, 2011 absolute maximum ratings thermal information maximum supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42v maximum differential input current . . . . . . . . . . . . . . . . . . . . . . . . . . 20ma maximum differential input voltage . . . . . . . . 42v or v - - 0.5v to v + + 0.5v min/max input voltage . . . . . . . . . . . . . . . . . . . . 42v or v - - 0.5v to v + + 0.5v max/min input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ma output short-circuit duration (1 output at a time) . . . . . . . . . . . . . . indefinite esd tolerance human body model (tested per jesd22-a114f) . . . . . . . . . . . . . . . . 3kv machine model (tested per jesd22-a115-a) . . . . . . . . . . . . . . . . . . 300v charged device model (tested per cdm-22ci0id) . . . . . . . . . . . . . . . 2kv operating conditions ambient operating temperature range . . . . . . . . . . . . . .-40c to +125c maximum operating junction temperature . . . . . . . . . . . . . . . . . .+150c supply voltage . . . . . . . . . . . . . . . . . . . . . . 3v (+1.8v/-1.2v) to 40v (20v) thermal resistance (typical) ja (c/w) jc (c/w) ISL28118 8 ld tdfn package (notes 5, 6). . . . . . . . . . 50 9 8 ld soic package (notes 4, 7) . . . . . . . . . . 120 60 8 ld msop package (notes 4, 7) . . . . . . . . . 165 57 isl28218 8 ld tdfn package (notes 5, 6). . . . . . . . . . 48 5.5 8 ld soic package (notes 4, 7) . . . . . . . . . . 120 55 8 ld msop package (notes 4, 7) . . . . . . . . . 150 45 storage temperature range. . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/ pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. 5. ja is measured in free air with the component mounted on a high effective thermal conductivity test board with ?direct attach? fe atures. see tech brief tb379 . 6. for jc , the ?case temp? location is the center of th e exposed metal pad on the package underside. 7. for jc , the ?case temp? location is taken at the package top center. electrical specifications v s 15v, v cm = 0, v o = 0v, r l = open, t a = +25c, unless otherwise noted. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by characterization . parameter description conditions min (note 8) typ max (note 8) unit v os input offset voltage ISL28118 -150 25 150 v -270 270 v isl28218 -230 40 230 v -290 290 v tcv os input offset voltage temperature coefficient ISL28118 -1.2 0.2 1.2 v/c isl28218 -1.4 0.3 1.4 v/c v os input offset voltage match (isl28218 only) -280 44 280 v -365 365 v i b input bias current -575 -230 na -800 na tci b input bias current temperature coefficient -0.8 na/c i os input offset current -50 4 50 na -75 75 na
ISL28118, isl28218 5 fn7532.2 may 16, 2011 cmrr common-mode rejection ratio v cm = v - - 0.5v to v + - 1.8v 118 db v cm = v - to v + -1.8v ISL28118 soic 102 118 db 98 db v cm = v - to v + -1.8v ISL28118 msop 102 118 db 97 db v cm = v - to v + -1.8v isl28218 103 118 db 99 db v cmir common mode input voltage range guaranteed by cmrr test v - - 0.5 v + - 1.8 v v - v + - 1.8 v psrr power supply rejection ratio v s = 3v to 40v, v cmir = valid input voltage 109 124 db 105 db a vol open-loop gain v o = -13v to +13v, r l = 10k to ground, ISL28118 soic 125 136 db 120 db v o = -13v to +13v, r l = 10k to ground, isl28218 125 136 db 122 db v o = -13v to +13v, r l = 10k to ground, ISL28118 msop 120 136 db 116 db v ol output voltage low, v out to v - , see figure 32 ISL28118 r l = 10k 70 mv 85 mv isl28218 r l = 10k 70 mv 73 mv v oh output voltage high, v + to v out see figure 32 ISL28118 isl28218 r l = 10k 110 mv 120 mv i s supply current/amplifier ISL28118 r l = open 0.85 1.2 ma 1.6 ma isl28218 r l = open 0.85 1.1 ma 1.4 ma i sc+ output short circuit source current r l = 10 to v - 16 ma i sc- output short circuit sink current r l = 10 to v + 28 ma v supply supply voltage range guaranteed by psrr 3 40 v ac specifications gbwp gain bandwidth product a cl = 101, v out = 100mv p-p ; r l = 2k 4 mhz e np-p voltage noise 0.1hz to 10hz, v s = 18v 300 nv p-p e n voltage noise density f = 10hz, v s = 18v 8.5 nv/ hz e n voltage noise density f = 100hz, v s = 18v 5.8 nv/ hz e n voltage noise density f = 1khz, v s = 18v 5.6 nv/ hz e n voltage noise density f = 10khz, v s = 18v 5.6 nv/ hz electrical specifications v s 15v, v cm = 0, v o = 0v, r l = open, t a = +25c, unless otherwise noted. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by characterization . (continued) parameter description conditions min (note 8) typ max (note 8) unit
ISL28118, isl28218 6 fn7532.2 may 16, 2011 in current noise density f = 1khz, v s = 18v 355 fa/ hz thd + n total harmonic distortion + noise 1khz, g = 1, v o = 3.5v rms , r l = 10k 0.0003 % transient response sr slew rate a v = 1, r l = 2k , v o = 10v p-p 1.2 v/s t r , t f , small signal rise time 10% to 90% of v out a v = 1, v out = 100mv p-p , r f = 0 , r l =2k to v cm 100 ns fall time 90% to 10% of v out a v = 1, v out = 100mv p-p , r f = 0 , r l = 2k to v cm 100 ns t s settling time to 0.01% 10v step; 10% to v out a v = 1, v out = 10v p-p , r f = 0 r l =2k to v cm 8.5 s electrical specifications v s 15v, v cm = 0, v o = 0v, r l = open, t a = +25c, unless otherwise noted. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by characterization . (continued) parameter description conditions min (note 8) typ max (note 8) unit electrical specifications v s 5v, v cm = 0, v o = 0v, t a = +25c, unless otherwise noted. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by characterization . parameter description conditions min (note 8) typ max (note 8) unit v os input offset voltage ISL28118 -150 25 150 v -270 270 v isl28218 -230 40 230 v -290 290 v tcv os input offset voltage temperature coefficient ISL28118 -1.2 0.2 1.2 v/c isl28218 -1.4 0.3 1.4 v/c v os input offset voltage match (isl28218 only) -280 44 280 v -365 365 v i b input bias current -575 -230 na -800 na tci b input bias current temperature coefficient -0.8 na/c i os input offset current -50 4 50 na -75 75 na cmrr common-mode rejection ratio v cm = v - - 0.5v to v + - 1.8v 119 db v cm = v - to v + -1.8v ISL28118 soic 101 117 db 97 db v cm = v - to v + -1.8v ISL28118 msop 101 117 db 96 db v cm = v - to v + -1.8v isl28218 101 117 db 97 db v cmir common mode input voltage range guaranteed by cmrr test v - - 0.5 v + - 1.8 v v - v + - 1.8 v
ISL28118, isl28218 7 fn7532.2 may 16, 2011 psrr power supply rejection ratio v s = 3v to 10v, v cmir = valid input voltage, ISL28118 soic isl28218 soic 109 124 db 105 db ISL28118 msop 108 124 db 103 db a vol open-loop gain v o = -3v to +3v, r l = 10k to ground, ISL28118 soic isl28218 soic 122 132 db 117 db ISL28118 msop 120 132 db 115 db v ol output voltage low, v out to v - , see figure 32 r l = 10k 38 mv 45 mv v oh output voltage high, v + to v out see figure 31 r l = 10k 65 mv 70 mv i s supply current/amplifier r l = open 0.85 1.1 ma 1.4 a i sc+ output short circuit source current r l = 10 to v - 13 ma i sc- output short circuit sink current r l = 10 to v + 20 ma ac specifications gbwp gain bandwidth product a cl = 101, v out = 100mv p-p ; r l = 2k 3.2 mhz e np-p voltage noise 0.1hz to 10hz 320 nv p-p e n voltage noise density f = 10hz 9 nv/ hz e n voltage noise density f = 100hz 5.7 nv/ hz e n voltage noise density f = 1khz 5.5 nv/ hz e n voltage noise density f = 10khz 5.5 nv/ hz in current noise density f = 1khz 380 fa/ hz thd + n total harmonic distortion + noise 1khz, g = 1, v o = 1.25v rms , r l =10k 0.0003 % transient response sr slew rate a v = 1, r l = 2k , v o = 4v p-p 1 v/s t r , t f , small signal rise time 10% to 90% of v out a v = 1, v out = 100mv p-p , r f = 0 , r l =2k to v cm 100 ns fall time 90% to 10% of v out a v = 1, v out = 100mv p-p , r f = 0 , r l = 2k to v cm 100 ns t s settling time to 0.01% 4v step; 10% to v out a v = 1, v out = 4v p-p , r f = 0 r l =2k to v cm 4s note: 8. compliance to datasheet limits is assu red by one or more methods: production test, characterization and/or design. electrical specifications v s 5v, v cm = 0, v o = 0v, t a = +25c, unless otherwise noted. boldface limits apply over the operating temperature range, -40c to +125c. temperature data established by characterization . (continued) parameter description conditions min (note 8) typ max (note 8) unit
ISL28118, isl28218 8 fn7532.2 may 16, 2011 typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. figure 3. ISL28118 input offset voltage distribution figure 4. ISL28118 input offset voltage distribution figure 5. isl28218 input offset voltage distribution figure 6. isl28218 input of fset voltage distribution figure 7. ISL28118 tcv os vs number of amplifiers 15v figure 8. ISL28118 tcv os vs number of amplifiers 5v v os (v) n u m b e r o f a m p li fi e r s 0 50 100 150 200 - 1 2 0 - 1 0 0 - 8 0 - 6 0 - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 v s = 15v v os (v) n u m b e r o f a m p l i f i e r s 0 50 100 150 200 - 1 2 0 - 1 0 0 - 8 0 - 6 0 - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 v s = 5v 0 50 100 150 200 250 - 1 2 5 - 1 0 0 - 7 5 - 5 0 - 2 5 0 2 5 5 0 7 5 1 0 0 1 2 5 1 5 0 1 7 5 2 0 0 v os (v) n u m b e r o f a m p l i f i e r s v s = 15v 0 50 100 150 200 250 - 1 2 5 - 1 0 0 - 7 5 - 5 0 - 2 5 0 2 5 5 0 7 5 1 0 0 1 2 5 1 5 0 1 7 5 2 0 0 v os (v) n u m b e r o f a m p l i f i e r s v s = 5v - 1 - 0 . 9 - 0 . 8 - 0 . 7 - 0 . 6 - 0 . 5 - 0 . 4 - 0 . 3 - 0 . 2 - 0 . 1 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 n u m b e r o f a m p l i f i e r s tcv os (v/c) 0 2 4 6 8 10 12 14 16 18 v s = 15v - 1 - 0 . 9 - 0 . 8 - 0 . 7 - 0 . 6 - 0 . 5 - 0 . 4 - 0 . 3 - 0 . 2 - 0 . 1 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 n u m b e r o f a m p l i f i e r s tcv os (v/c) 0 2 4 6 8 10 12 14 16 18 v s = 5v
ISL28118, isl28218 9 fn7532.2 may 16, 2011 figure 9. isl28218 tcv os vs number of amplifiers 15v figure 10. isl28218 tcv os vs number of amplifiers 5v figure 11. v os vs temperature figure 12. input offset voltage vs input common mode voltage, v s = 15v figure 13. i bias vs v s figure 14. i bias vs temperature vs supply typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) 0 5 10 15 20 25 30 - 1 - 0 . 9 - 0 . 8 - 0 . 7 - 0 . 6 - 0 . 5 - 0 . 4 - 0 . 3 - 0 . 2 - 0 . 1 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 n u m b e r o f a m p l i f i e r s tcv os (v/c) v s = 15v - 1 - 0 . 9 - 0 . 8 - 0 . 7 - 0 . 6 - 0 . 5 - 0 . 4 - 0 . 3 - 0 . 2 - 0 . 1 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 n u m b e r o f a m p l i f i e r s tcv os (v/c) 0 5 10 15 20 25 30 35 v s = 5v temperature (c) -40 -20 0 20 40 60 80 100 120 0 10 20 30 40 50 60 70 80 90 100 v o s ( v ) v s = 5v v s = 15v v os (v) input common mode voltage (v) -400 -300 -200 -100 0 100 200 300 400 -16 -15 -14 -13 13 14 15 16 -40c +25c +125c i bias (na) -500 -450 -400 -350 -300 -250 -200 -150 -100 -50 0 2 4 6 8 10121416182022242628303234363840 v s (v) i bias (na) -400 -350 -300 -250 -200 -150 temperature (c) -40-20 0 20406080100120 v s = 2.25v v s = 5v v s = 15v v s = 20v v s = +2v/-1v
ISL28118, isl28218 10 fn7532.2 may 16, 2011 figure 15. ISL28118 cmrr vs temperature, v s = 15v figure 16. ISL28118 cmrr vs temperature, v s = 5v figure 17. isl28218 cmrr vs temperature, v s = 15v figure 18. isl28218 cmrr vs temperature, v s = 5v figure 19. cmrr vs frequency, v s = 15v figure 20. psrr vs temperature, v s = 15v typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) temperature (c) -40-20 0 20406080100120 cmrr (db) 110 112 114 116 118 120 122 124 temperature (c) -40 -20 0 20 40 60 80 100 120 cmrr (db) 110 112 114 116 118 120 122 124 temperature (c) -40 -20 0 20 40 60 80 100 120 cmrr (db) 110 112 114 116 118 120 122 124 126 128 130 132 channel-a channel-b temperature (c) -40 -20 0 20 40 60 80 100 120 cmrr (db) 110 112 114 116 118 120 122 124 126 128 130 132 channel-a channel-b c m r r ( d b ) frequency (hz) 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 1m 1 10 100 1k 10k 100k 1m 10m 100m 1g 0.1 0.01 v s = 15v simulation temperature (c) -40-20 0 20406080100120 100 105 110 115 120 125 130 135 140 p s r r ( d b ) isl28218 ISL28118
ISL28118, isl28218 11 fn7532.2 may 16, 2011 figure 21. psrr vs frequency, v s = 15v figure 22. psrr vs frequency, v s = 5v figure 23. open-loop gain, phase vs frequency, v s = 15v figure 24. frequency response vs closed loop gain figure 25. gain vs frequency vs r l , v s = 15v figure 26. gain vs frequency vs r l , v s = 5v typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) 10 100 1k 10k 100k 1m 10m p s r r ( d b ) frequency (hz) -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 v s = 15v c l = 4pf v cm = 1v p-p r l = 10k a v = 1 psrr- psrr+ 10 100 1k 10k 100k 1m 10m p s r r ( d b ) frequency (hz) -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 v s = 5v c l = 4pf v cm = 1v p-p r l = 10k a v = 1 psrr- psrr+ -100 -80 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 200 1m 1 10 100 1k 10k 100k 1m 10m100m 1g g a i n ( d b ) frequency (hz) 0.1 gain v s = 15v r l = 1m ? phase 0.01 -10 0 10 20 30 40 50 60 70 1k 10k 100k 1m 10m g a i n ( d b ) frequency (hz) r f = 0, r g = a cl = 1 a cl = 10 a cl = 100 a cl = 1000 r f = 10k ? , r g = 10 ? r f = 10k ? , r g = 100 ? r f = 10k ? , r g = 1k ? v s = 5v & 15v c l = 4pf v out = 100mv p-p r l = 2k 100 frequency (hz) normalized gain (db) 100k 1m 10m 10k 1k -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 100 v s = 15v a v = +1 v out = 100mv p-p c l = 4pf r l = 1k r l = 499 r l = 100 r l = 49.9 r l = open, 100k, 10k frequency (hz) normalized gain (db) 100k 1m 10m 10k 1k -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 100 v s = 5v a v = +1 v out = 100mv p-p c l = 4pf r l = 49.9 r l = 100 r l = 499 r l = open, 100k, 10k r l = 1k
ISL28118, isl28218 12 fn7532.2 may 16, 2011 figure 27. gain vs frequency vs output voltage figure 28. gain vs frequency vs supply voltage figure 29. output overhead voltage vs temperature, v s = 15v, r l =10k figure 30. output overhead voltage vs temperature, v s = 5v, r l = 10k figure 31 . output overhead voltage high vs load current, v s = 5v and 15v figure 32. output overhead voltage low vs load current, v s = 5v and 15v typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) frequency (hz) normalized gain (db) 100k 1m 10m 10k 1k - -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 100 v s = 5v a v = +1 r l = inf c l = 4pf v out = 1v p-p v out = 500mv p-p v out = 100mv p-p v out = 10mv p-p v out = 50mv p-p normalized gain (db) frequency (hz) -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 100 1k 10k 100k 1m 10m c l = 4pf r l = 10k a v = +1 v out = 100mv p-p v s = 15v v s = 1.5v v s = 5v temperature (c) -40 -20 0 20 40 60 80 100 120 40 50 60 70 80 90 v oh v s = 15v r l = 10k v ol v o h a n d v o l ( m v ) temperature (c) -40 -20 0 20 40 60 80 100 120 20 22 24 26 28 30 32 34 36 38 40 v oh v s = 5v r l = 10k v ol v o h a n d v o l ( m v ) v + - v o h ( v ) load current (ma) 0.001 0.01 0.1 1 0.001 0.01 0.1 1 10 v s = 5v and 15v +125c -40c +25c load current (ma) 0.001 0.01 0.1 1 0.001 0.01 0.1 1 10 v s = 5v and 15v v o l - v - ( v ) -40c +25c +125c
ISL28118, isl28218 13 fn7532.2 may 16, 2011 figure 33. output voltage swing vs load current v s = 15v figure 34. output voltage swing vs load current v s = 5v figure 35. ISL28118 supply current vs temperature vs supply voltage figure 36. isl28218 supply current vs temperature vs supply voltage figure 37. supply current vs supply voltage typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) v o h 0 v o l i-force (ma) 11 12 13 14 15 -15 -14 -13 -12 -11 20 18 16 14 12 10 8 6 4 2 10 -10 v s = 15v a v = 2 v in = 7.5v-dc r f = r g = 100k +125c -40c +75c +25c 0c v o h 0 v o l i-force (ma) 1 2 3 4 5 -5 -4 -3 -2 -1 20 18 16 14 12 10 8 6 4 2 +125c -40c v s = 5v a v = 2 v in = 2.5v-dc r f = r g = 100k +75c +25c 0c temperature (c) -40 -20 0 20 40 60 80 100 120 current (a) 400 600 800 1000 1200 1400 v s = 2.25v v s = 15v v s = 21v temperature (c) -40 -20 0 20 40 60 80 100 120 current (a) 400 600 800 1000 1200 1400 v s = 2.25v v s = 21v v s = 15v v supply (v) 0 2 4 6 8 1012141618202224262830323436384042 0 100 200 300 400 500 600 700 800 900 1000 1100 i s u p p l y p e r a m p l i f i e r ( a ) isl28218 ISL28118
ISL28118, isl28218 14 fn7532.2 may 16, 2011 figure 38. input noise voltage (en) and current (in) vs frequency, v s = 18v figure 39. input noise voltage (en) and current (in) vs frequency, v s = 5v figure 40. input noise voltage 0.1hz to 10hz, v s = 18v figure 41. input noise voltage 0.1hz to 10hz, v s = 5v figure 42. thd+n vs frequency vs temperature, a v = 1, 10, r l = 2k figure 43. thd+n vs frequency vs temperature, a v = 1, 10, r l = 10k typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) 0.1 1 10 100 0.1 1 10 100 0.1 1 10 100 1k 10k 100k i n p u t n o i s e v o l t a g e ( n v / h z ) frequency (hz) i n p u t n o i s e c u r r e n t ( f a / h z ) input noise voltage input noise current v s = 18v 0.1 1 10 100 0.1 1 10 100 0.1 1 10 100 1k 10k 100k i n p u t n o i s e v o l t a g e ( n v / h z ) frequency (hz) i n p u t n o i s e c u r r e n t ( f a / h z ) input noise voltage input noise current v s = 5v i n p u t n o i s e v o l t a g e ( n v ) 012345678910 time (s) -500 -400 -300 -200 -100 0 100 200 300 400 500 v s = 18v a v = 10k i n p u t n o i s e v o l t a g e ( n v ) 012345678910 time (s) -500 -400 -300 -200 -100 0 100 200 300 400 500 v s = 5v a v = 10k 0.0001 0.001 0.01 0.1 10 100 1k 10k 100k t h d + n ( % ) frequency (hz) a v = 1 a v = 10 +125c -40c +25c +125c -40c +25c v s = 15v c l = 4pf v out = 10v p-p r l = 2k c-weighted 22hz to 500khz 0.0001 0.001 0.01 0.1 10 100 1k 10k 100k t h d + n ( % ) frequency (hz) a v = 1 a v = 10 +125c -40c +125c -40c +25c v s = 15v c l = 4pf v out = 10v p-p r l = 10k c-weighted 22hz to 500khz +25c
ISL28118, isl28218 15 fn7532.2 may 16, 2011 figure 44. thd+n vs output voltage (v out ) vs temperature, a v = 1, 10, r l = 2k figure 45. thd+n vs output voltage (v out ) vs temperature, a v = 1, 10, r l = 10k figure 46. large signal 10v step response, v s = 15v figure 47. large signal 4v step response, v s = 5v figure 48. small signal transient response, v s = 5v, 15v figure 49. no phase reversal typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) 0.0001 0.001 0.01 0.1 1 0 5 10 15 20 25 30 v out (v p-p ) t h d + n ( % ) a v = 1 a v = 10 +125c -40c +25c +125c -40c +25c v s = 15v c l = 4pf f = 1khz r l = 2k c-weighted 22hz to 22khz 0.0001 0.001 0.01 0.1 1 0 5 10 15 20 25 30 v out (v p-p ) t h d + n ( % ) a v = 1 a v = 10 -40c +25c +125c -40c +25c v s = 15v c l = 4pf f = 1khz r l = 10k c-weighted 22hz to 22khz +125c -6 -4 -2 0 2 4 6 0 102030405060708090100 v o u t ( v ) time (s) v s = 15v a v = 1 r l = 2k c l = 4pf 0 102030405060708090100 v o u t ( v ) time (s) -2.4 -2.0 -1.6 -1.2 -0.8 -0.4 0 0.4 0.8 1.2 1.6 2.0 2.4 v s = 5v a v = 1 r l = 2k c l = 4pf v o u t ( v ) time (s) -100 -80 -60 -40 -20 0 20 40 60 80 100 0 0.20.40.60.81.01.21.41.61.8 2 v s = 15v a v = 1 r l = 2k c l = 4pf v s = 5v and -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 01234 i n p u t a n d o u t p u t ( v ) time (ms) input v s = 5v v in = 5.9v output
ISL28118, isl28218 16 fn7532.2 may 16, 2011 figure 50. positive output overload response time, v s = 15v figure 51. negative output overload response time, v s = 15v figure 52. positive output overload response time, v s = 5v figure 53. negative output overload response time, v s = 5v figure 54. output impedance vs frequency, v s = 15v figure 55. output impedance vs frequency, v s = 5v typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) o u t p u t ( v ) i n p u t ( m v ) time (s) 0 4 8 12 16 20 0 40 80 120 160 200 0 4 8 1216202428323640 v s = 15v a v = 100 v in = 100mv p-p overdrive = 1v r l = 10k output input o u t p u t ( v ) i n p u t ( m v ) time (s) -20 -16 -12 -8 -4 0 -200 -160 -120 -80 -40 0 0 4 8 12 16 20 24 28 32 36 40 v s = 15v a v = 100 v in = 100mv p-p overdrive = 1v r l = 10k output input o u t p u t ( v ) i n p u t ( m v ) time (s) 0 1 2 3 4 5 6 0 10 20 30 40 50 60 0 4 8 1216202428323640 v s = 5v a v = 100 v in = 50mv p-p overdrive = 1v r l = 10k output input o u t p u t ( v ) i n p u t ( m v ) time (s) 0 4 8 12 16 20 24 28 32 36 40 -6 -5 -4 -3 -2 -1 0 -60 -50 -40 -30 -20 -10 0 v s = 5v a v = 100 v in = 50mv p-p overdrive = 1v r l = 10k output input 0.01 0.10 1 10 100 10 100 1k 10k 100k 1m 10m z o u t ( ? ) frequency (hz) 1 v s = 15v a v = 1 a v = 10 a v = 100 0.01 0.10 1 10 100 10 100 1k 10k 100k 1m 10m z ou t ( ? ) frequency (hz) 1 v s = 5v a v = 1 a v = 10 a v = 100
ISL28118, isl28218 17 fn7532.2 may 16, 2011 figure 56. overshoot vs capacitive load, v s = 15v figure 57. overshoot vs capacitive load, v s =5v figure 58. ISL28118 short circuit current vs temperature, v s = 15v figure 59. isl28218 short circuit current vs temperature, v s = 15v figure 60. max output voltage vs frequency f igure 61. channel separation vs frequency, r l = inf, v s = 15v typical performance curves v s = 15v, v cm = 0v, r l = open, unless otherwise specified. (continued) o v e r s h o o t ( % ) load capacitance (nf) 0 10 20 30 40 50 60 0.001 0.010 0.100 1 10 100 v s = 15v v out = 100mv p-p a v = 10 a v = 1 a v = -1 o v e r s h o o t ( % ) load capacitance (nf) 0 10 20 30 40 50 60 0.001 0.01 0.1 1 10 100 v s = 5v v out = 100mv p-p a v = 10 a v = 1 a v = -1 temperature (c) -40-20 0 20406080100120 10 12 14 16 18 20 22 24 26 28 30 i s c ( m a ) i sc -source v s = 15v r l = 10k i sc -sink temperature (c) -40 -20 0 20 40 60 80 100 120 10 12 14 16 18 20 22 24 26 28 30 i s c ( m a ) i sc -source v s = 15v r l = 10k i sc -sink 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 1k 10k 100k 1m v ou t ( v p - p ) frequency (hz) v s = 15v a v = 1 10 100 1k 10k 100k 1m 10m c r o s s t a l k ( d b ) frequency (hz) r l _ transmit = 2k r l _ receive = 10k 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 r l _ transmit = r l _ receive = 10k v s = 15v c l = 4pf v cm = 1v p-p
ISL28118, isl28218 18 fn7532.2 may 16, 2011 applications information functional description the ISL28118 and isl28218 are single and dual, 3.2mhz, single-supply, rail-to-rail output amplifiers with a common mode input voltage range extending to a range of 0.5v below the v- rail. their input stages are optimized for precision sensing of ground-referenced signals in single-supply applications. the input stage is able to handle large input differential voltages without phase inversion, making these amplifiers suitable for high-voltage comparator applic ations. their bipolar design features high open loop gain an d excellent dc input and output temperature stability. these op amps feature very low quiescent current of 850v, and low temperature drift. both devices are fabricated in a new precision 40v complementary bipolar di process and are immune from latch-up. operating voltage range the op amp is designed to operate over a single supply range of 3v to 40v or a split supply voltage range of +1.8v/-1.2v to 20v. the device is fully characterized at 10v (5v) and 30v (15v). both dc and ac performance remain vi rtually unchanged over the complete operating voltage rang e. parameter variation with operating voltage is shown in the ?typical performance curves? beginning on page 8. the input common mode voltage to the v+ rail (v+ -1.8v over the full temperature range) may lim it amplifier operation when operating from split v+ and v- supplies. figure 12 shows the common mode input voltage range variation over temperature. input stage performance the ISL28118 and isl28218 pnp input stage has a common mode input range extending up to 0.5v below ground at +25c (figure 12). full amplifier performance is guaranteed down for input voltage down to ground (v-) over the -40c to +125c temperature range. for common mode voltages down to -0.5v below ground (v-), the amplifie rs are fully functional, but performance degrades slightly ov er the full temperature range. this feature provides excellent cmrr, ac performance, and dc accuracy when amplifying low-le vel, ground-referenced signals. the input stage has a maximum input differential voltage equal to a diode drop greater than th e supply voltage (max 42v) and does not contain the back-to-back input protection diodes found on many similar amplifiers. this feature enables the device to function as a precision comparator by maintaining very high input impedance for high-voltage differential input comparator voltages. the high differential input impedance also enables the device to operate reliably in large signal pulse applications, without the need for anti-paral lel clamp diodes required on mosfet and most bipolar inpu t stage op amps. thus, input signal distortion caused by nonlinear clamps under high slew rate conditions is avoided. in applications where one or both amplifier input terminals are at risk of exposure to voltages beyond the supply rails, current-limiting resistors may be needed at each input terminal (see figure 62, r in +, r in -) to limit current through the power-supply esd diodes to 20ma. output drive capability the bipolar rail-to-rail output stag e features low saturation levels that enable an output voltage swing to less than 15mv when the total output load (including feedback resistance) is held below 50a (figures 31 and 32). with 15v supplies, this can be achieved by using feedback resistor values >300k ? . the output stage is internally current limited. output current limit over temperature is shown in figures 33 and 34. the amplifiers can withstand a short circuit to ei ther rail as long as the power dissipation limits are not exceeded. this applies to only one amplifier at a time fo r the dual op amp. continuous operation under these conditions may degrade long-term reliability. the amplifiers perform well when driving capacitive loads (figures 56 and 57). the unity gain, voltage follower (buffer) configuration provides the high est bandwidth but is also the most sensitive to ringing produced by load capacitance found in bnc cables. unity gain overshoot is limited to 35% at capacitance values to 0.33nf. at gains of 10 and higher, the device is capable of driving more than 10nf without significant overshoot. output phase reversal output phase reversal is a change of polarity in the amplifier transfer function when the input voltage exceeds the supply voltage. the ISL28118 and isl 28218 are immune to output phase reversal out to 0.5v beyond the rail (v abs max ) limit (figure 49). single channel usage the isl28218 is a dual op amp. if the application requires only one channel, the user must configure the unused channel to prevent it from oscillating. the unused channel oscillates if the input and output pins are floating. this results in higher-than-expected supply currents and possible noise injection into the channel being used. the proper way to prevent oscillation is to short the output to the inverting input, and ground the positive input (figure 63). figure 62. input esd diode current limiting - + r in - r l v in - v+ v- r in + v in + r f r g figure 63. preventing oscillations in unused channels - +
ISL28118, isl28218 19 fn7532.2 may 16, 2011 power dissipation it is possible to exceed the +150c maximum junction temperatures under certain load and power supply conditions. it is therefore important to ca lculate the maximum junction temperature (t jmax ) for all applications to determine if power supply voltages, load conditions , or package type need to be modified to remain in the safe operating area. these parameters are related using equation 1: where ?p dmaxtotal is the sum of the maximum power dissipation of each amplifier in the package (pd max ) ?t max = maximum ambient temperature ? ja = thermal resistance of the package pd max for each amplifier can be calculated using equation 2: where ?pd max = maximum power dissipation of 1 amplifier ?v s = total supply voltage ?i qmax = maximum quiescent supply current of one amplifier ?v outmax = maximum output voltage swing of the application ?r l = load resistance ISL28118 and isl28218 spice model figure 64 shows the spice model schematic and figure 65 shows the net list for the spice model. the model is a simplified version of the actual device and simulates important ac and dc parameters. ac parameters incorporated into the model are: 1/f and flatband noise vo ltage, slew rate, cmrr, and gain and phase. the dc parameters are i os , total supply current, and output voltage swing. the model uses ty pical parameters given in the ?electrical specifications? table be ginning on page 4. the avol is adjusted for 136db with the dominant pole at 0.6hz. the cmrr is set at 120db, f = 50khz. the input stage models the actual device to present an accurate ac repres entation. the model is configured for an ambient temperature of +25c. figures 66 through 80 show the characterization vs simulation results for the noise voltage, open loop gain phase, closed loop gain vs frequency, gain vs frequency vs r l , cmrr, large signal 10v step response, small signal 0.1v step, and output voltage swing 15v supplies. license statement the information in the spice model is protected under united states copyright laws. intersil corporation hereby grants users of this macro-model, hereto referred to as ?licensee?, a nonexclusive, nontransferable licence to use this model, as long as the licensee abides by the terms of this agreement. before using this macro-model, the licensee should read this license. if the licensee does not accept these terms, permission to use the model is not granted. the licensee may not sell, loan, rent, or license the macro-model, in whole, in part, or in modified form, to anyone outside the licensee?s company. the licensee may modify the macro-model to suit his/her sp ecific applications, and the licensee may make copies of this macro-model for use within their company only. this macro-model is provided ?as is, where is, and with no warranty of any kind either expressed or implied, including buy not limited to any implied warranties of merchantability and fitness for a particular purpose.? in no event will intersil be liable for special, collateral, incidental, or consequential damages in connection with or arising out of the use of this macro-model. intersil reserves the right to make changes to the product and the macro-model without prior notice. t jmax t max ja xpd maxtotal + = (eq. 1) pd max v s i qmax v s ( - v outmax ) v outmax r l ------------------------ + = (eq. 2)
ISL28118, isl28218 20 fn7532.2 may 16, 2011 figure 64. spice schematic vout v-- v++ common mode gain stage with zero correction current sources output stage input stage 1st gain stage mid supply ref v 2nd gain stage 19 27 vout 5 14 23 vmid v-- v++ v++ v-- 6 12 17 v+ vg 16 11 vin- vin+ 8 v-- 4 3 10 7 9 22 21 24 18 vcm vc 25 1 13 26 v- 2 15 20 v-- 0 0 0 0 q6 pnp_input q6 + - g4 + - g4 dy d12 dy d12 - + + - en gain = 0.3 - + + - en gain = 0.3 r16 80 + - g13 gain = 12.5e-3 - r13 795.7981 795.7981 l1 3.18319e-09 - + + - - + + - gain = 0.5 + - g6 gain = 1 - g6 c4 10e-12 c4 10e-12 l3 3.18319e-09 l3 3.18319e-09 d1 dbreak q8 pnp_lateral q8 dx d5 dx d5 c3 10e-12 c3 10e-12 i3 54e-6 i3 cindif 1.33e-12 ios 4e-9 ios + - gain = 1 + - q9 pnp_lateral q9 pnp_lateral r18 750 r18 750 r1 5e11 5e11 isy 2.5e-3 isy r9 1e-3 r6 1 1 v1 -0.91 v1 dn d14 dn d14 + - g8 gain = 1 - g8 - + + - e3 gain = 1 - + - v5 -0.4 v5 -0.4 + - g12 gain = 12.5e-3 + - gain = 12.5e-3 i2 54e-6 i2 i1 80e-6 i1 dx d4 dx d4 795.7981 cin2 4.02e-12 v4 -0.96 v4 cin1 4.02e-12 4.02e-12 dy d9 dy d9 v6 -0.4 v6 dx d6 dx d6 dx d7 dx d7 - g2 g gain = 0.65897 - g2 g gain = 0.65897 + - g9 gain = 1.2566e-3 + - 80 v7 0.1 0.1 r2 5e11 5e11 r10 1e-3 + - gain = 1.69138e-3 + - c2 6.6667e-11 c2 6.6667e-11 v3 -0.91 v3 dn d13 dn d13 v2 -0.96 v2 r5 1 1 + - g14 gain = 12.5e-3 - l2 3.18319e-09 + - g11 gain = 12.5e-3 + - + - g5 gain = 1 + - l4 3.18319e-09 l4 3.18319e-09 r7 3.7304227e9 dx d10 dx d10 r12 1e-3 r12 dx d3 dx d3 dx d8 dx d8 dx d11 dx d11 c1 6.6667e-11 c1 6.6667e-11 d2 dbreak r17 750 r17 750 + - g10 gain = 1.2566e-3 + - g10 q7 pnp_input q7 r3 1k r3 + - g1 gain = 0.65897 - g1 gain = 0.65897 - + + - eos gain = 1 - + + - eos v8 0.1 0.1 r4 1k r4 r11 1e-3 r11 1e-3 - + + - e2 gain = 1 - + + - e2 3.7304227e9 r14 gain = 1.69138e-3 r15
ISL28118, isl28218 21 fn7532.2 may 16, 2011 *ISL28118_218 macromodel - covers following *products *ISL28118 *isl28218 * *revision history: * revision a, lafontaine february 8th 2011 * model for noise, supply currents, cmrr *120db f = 40khz, avol 136db f = 0.5hz * sr = 1.2v/us, gbwp 4mhz. *copyright 2011 by intersil corporation *refer to data sheet ?license statement? *use of this model indicates your acceptance *with the terms and provisions in the license *statement. * *intended use: *this pspice macromodel is intended to give *typical dc and ac performance characteristics *under a wide range of external circuit *configurations using compatible simulation *platforms ? such as isim pe. * *device performance features supported by this *model: *typical, room temp., nominal power supply *voltages used to produce the following *characteristics: *open and closed loop i/o impedances, *open loop gain and phase, *closed loop bandwidth and frequency *response, *loading effects on closed loop frequency *response, *input noise terms including 1/f effects, *slew rate, *input and output headroom limits to i/o *voltage swing, *supply current at nominal specified supply *voltages, * *device performance features not supported *by this model: *harmonic distortion effects, *output current limiting (current will limit at *40ma), *disable operation (if any), *thermal effects and/or over temperature *parameter variation, *limited performance variation vs. supply *voltage is modeled, *part to part performance variation due to *normal process parameter spread, *any performance difference arising from *different packaging, *load current reflected into the power supply *current. * source ISL28118_218 spicemodel * * connections: +input * | -input * | | +vsupply * | | | -vsupply * | | | | output .subckt ISL28118_218 vin+ vin-v+ v- vout * source ISL28118_218_presubckt_0 * *voltage noise e_en vin+ 6 2 0 0.3 d_d13 1 2 dn d_d14 1 2 dn v_v7 1 0 0.1 v_v8 4 0 0.1 r_r17 2 0 750 *r_r18 3 0 750 * *input stage q_q6 11 10 9 pnp_input q_q7 8 7 9 pnp_input q_q8 v-- vin- 7 pnp_lateral q_q9 v-- 12 10 pnp_lateral i_i1 v++ 9 dc 80e-6 i_i2 v++ 7 dc 54e-6 i_i3 v++ 10 dc 54e-6 i_ios 6 vin- dc 4e-9 *d_d1 7 10 dbreak *d_d2 10 7 dbreak r_r1 5 6 5e11 r_r2 vin- 5 5e11 r_r3 v-- 8 1000 r_r4 v-- 11 1000 c_cin1 v-- vin- 4.02e-12 c_cin2 v-- 6 4.02e-12 c_cindif 6 vin- 1.33e-12 * *1st gain stage g_g1 v++ 14 8 11 0.65897 g_g2 v-- 14 8 11 0.65897 v_v1 13 14 -0.91 v_v2 14 15 -0.96 d_d3 13 v++ dx d_d4 v-- 15 dx r_r5 14 v++ 1 r_r6 v-- 14 1 * *2nd gain stage g_g3 v++ vg 14 vmid 1.69138e-3 g_g4 v-- vg 14 vmid 1.69138e-3 v_v3 16 vg -0.91 v_v4 vg 17 -0.96 d_d5 16 v++ dx d_d6 v-- 17 dx r_r7 vg v++ 3.7304227e9 r_r8 v-- vg 3.7304227e9 c_c1 vg v++ 6.6667e-11 c_c2 v-- vg 6.6667e-11 * *mid supply ref e_e2 v++ 0 v+ 0 1 e_e3 v-- 0 v- 0 1 e_e4 vmid v-- v++ v-- 0.5 i_isy v+ v- dc 0.85e-3 * *common mode gain stage with zero g_g5 v++ 19 5 vmid 1 g_g6 v-- 19 5 vmid 1 g_g7 v++ vc 19 vmid 1 g_g8 v-- vc 19 vmid 1 e_eos 12 6 vc vmid 1 l_l1 18 v++ 3.18319e-09 l_l2 20 v-- 3.18319e-09 l_l3 21 v++ 3.18319e-09 l_l4 22 v-- 3.18319e-09 r_r9 19 18 1e-3 r_r10 20 19 1e-3 r_r11 vc 21 1e-3 r_r12 22 vc 1e-3 * *pole stage g_g9 v++ 23 vg vmid 1.2566e-3 g_g10 v-- 23 vg vmid 1.2566e-3 r_r13 23 v++ 795.7981 r_r14 v-- 23 795.7981 c_c3 23 v++ 10e-12 c_c4 v-- 23 10e-12 * *output stage with correction current sources g_g11 26 v-- vout 23 12.5e-3 g_g12 27 v-- 23 vout 12.5e-3 g_g13 vout v++ v++ 23 12.5e-3 g_g14 v-- vout 23 v-- 12.5e-3 d_d7 23 24 dx d_d8 25 23 dx d_d9 v-- 26 dy d_d10 v++ 26 dx d_d11 v++ 27 dx d_d12 v-- 27 dy v_v5 24 vout -0.4 v_v6 vout 25 -0.4 r_r15 vout v++ 80 r_r16 v-- vout 80 .model pnp_lateral pnp(is=1e-016 bf=250 va=80 + ik=0.138 rb=0.01 re=0.101 rc=180 kf=0 af=1) .model pnp_input pnp(is=1e-016 bf=100 va=80 + ik=0.138 rb=0.01 re=0.101 rc=180 kf=0 af=1) .model dbreak d(bv=43 rs=1) .model dn d(kf=6.69e-9 af=1) .model dx d(is=1e-12 rs=0.1) .model dy d(is=1e-15 bv=50 rs=1) .ends ISL28118_218 figure 65. spice net list
ISL28118, isl28218 22 fn7532.2 may 16, 2011 characterization vs simulation results figure 66. characterized input noise voltage figure 67. simulated input noise voltage figure 68. characterized open-loop gain, phase vs frequency figure 69. simulated open-loop gain, phase vs frequency figure 70. characterized closed-loop gain vs frequency figure 71. simulated closed-loop gain vs frequency 0.1 1 10 100 0.1 1 10 100 0.1 1 10 100 1k 10k 100k i n p u t n o i s e v o lta g e ( nv / h z ) frequency (hz) i n p u t n o i s e c u r r e n t ( f a / h z ) input noise voltage input noise current v s = 18v 0.1 1 10 100 0.1 1 10 100 1k 10k 100k i n p u t n o i s e v o lta g e ( nv / h z ) frequency (hz) -100 -80 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 200 1m 1 10 100 1k 10k 100k 1m 10m100m 1g g a i n ( d b ) frequency (hz) 0.1 gain v s = 15v r l = 1m ? phase 0.01 -100 -80 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 200 1m 1 10 100 1k 10k 100k 1m 10m100m 1g g a i n ( d b ) frequency (hz) 0.1 0.01 v s = 15v r l = 1m ? phase gain -10 0 10 20 30 40 50 60 70 1k 10k 100k 1m 10m g a i n ( d b ) frequency (hz) r f = 0, r g = a cl = 1 a cl = 10 a cl = 100 a cl = 1000 r f = 10k ? , r g = 10 ? r f = 10k ? , r g = 100 ? r f = 10k ? , r g = 1k ? v s = 5v & 15v c l = 4pf v out = 100mv p-p r l = 2k 100 -10 0 10 20 30 40 50 60 70 1k 10k 100k 1m 10m g a i n ( d b ) frequency (hz) r f = 0, r g = a cl = 1 a cl = 10 a cl = 1000 r f = 10k ? , r g = 10 ? r f = 10k ? , r g = 100 ? r f = 10k ? , r g = 1k ? v s = 5v & 15v c l = 4pf v out = 100mv p-p r l = 2k 100 a cl = 100
ISL28118, isl28218 23 fn7532.2 may 16, 2011 figure 72. characterized gain vs frequency vs r l figure 73. simulated gain vs frequency vs r l figure 74. characterized cmrr vs frequency figure 75. simulated cmrr vs frequency figure 76. characterized large-signal 10v step response figure 77. simulated large-signal 10v step response characterization vs simulation results (continued) frequency (hz) normalized gain (db) 100k 1m 10m 10k 1k -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 v s = 15v a v = +1 v out = 100mv p-p c l = 4pf r l = 1k r l = 499k r l = 100k r l = 49.9k r l = open, 100k, 10k 100 frequency (hz) normalized gain (db) 100k 1m 10m 10k 1k -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 100 r l = 1k r l = 499k r l = 100k r l = 49.9k r l = open, 100k, 10k v s = 15v a v = +1 v out = 100mv p-p c l = 4pf c m r r ( d b ) frequency (hz) 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 1m 1 10 100 1k 10k 100k 1m 10m 100m 1g 0.1 0.01 v s = 15v simulation c m r r ( d b ) frequency (hz) 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 1m 1 10 100 1k 10k 100k 1m 10m 100m 1g 0.1 0.01 v s = 15v simulation -6 -4 -2 0 2 4 6 0 102030405060708090100 v o u t ( v ) time (s) v s = 15v a v = 1 r l = 2k c l = 4pf -6 -4 -2 0 2 4 6 0 102030405060708090100 v o u t ( v ) time (s) v s = 15v a v = 1 r l = 2k c l = 4pf
ISL28118, isl28218 24 fn7532.2 may 16, 2011 figure 78. characterized small-signal transient response figure 79. simulated small-signal transient response figure 80. simulated output voltage swing characterization vs simulation results (continued) v o u t ( v ) time (s) -100 -80 -60 -40 -20 0 20 40 60 80 100 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v s = 15v a v = 1 r l = 2k c l = 4pf v s = 5v and v o u t ( v ) time (s) -100 -80 -60 -40 -20 0 20 40 60 80 100 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v s = 15v a v = 1 r l = 2k c l = 4pf v s = 5v and 0 0.5 1.0 1.5 2.0 -20v -10v 0v 10v 20v o u t p u t v o l t a g e s w i n g ( v ) time (ms) v s = 15v voh = 14.88v vol = -14.93v r l = 10k
ISL28118, isl28218 25 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn7532.2 may 16, 2011 for additional products, see www.intersil.com/product_tree products intersil corporation is a leader in the design and manufacture of high-performance analog semico nductors. the company's product s address some of the industry's fastest growing markets, such as , flat panel displays, cell phones, handheld products, and noteb ooks. intersil's product families address power management and analog sign al processing functions. go to www.intersil.com/products for a complete list of intersil product families. *for a complete listing of applications, related documentation an d related parts, please see the respective device information page on intersil.com: ISL28118 , isl28218 . to report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff fits are available from our website at: http://rel.intersil.co m/reports/search.php revision history the revision history provided is for inform ational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest rev. date revision change 5/9/2011 fn7532.2 page 2: added nc pin to pin descriptions table. page 3: added isl28218eval1z evaluation board to the ordering information table. page 12: added new output overhead voltage plots (figs. 31,32) pages 19 through 24: added spice model schematic, netlist, description and figs. 66 through 80. 11/12/10 fn7532.1 on page 1: features section, added low input offset voltage and superb offset voltage temperature drift for ISL28118. updated intersil trademark statement (bottom of page) on page 3: removed ?coming soon? from ISL28118fbz. updated tape & reel note. on page 4: change ISL28118 theta ja value from 158 to 165. added ISL28118 min/max specs to vos (input offset voltage), tcvos and min specs to cmrr. on page 5: added avol min spec for ISL28118 in db. ch anged existing avol spec fr om v/mv to db. added vol max spec for ISL28118, is typ and max spec for ISL28118. changed ts from 18s to 8.5s. on page 6: added min max vos spec, tcvos spec for ISL28118. changed avol specs from v/mv to db. on page 7: changed slew rate typ from 1.2v/s to 1v/s. added for ts typ spec = 4s. changed min/max note 8 to ?compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.? added figs 3 & 4 for ISL28118. figures 5 & 6 moved to page 8. on page 8: added figures 7 & 8 on page 10: added figures 15 & 16 for ISL28118 on page 10, in figure 19, changed vs from 5v to 15v on page 12 and page 13: added figures 27, 28, 31 & 34 for ISL28118 on page 13: added figure 35 for ISL28118 on page 14: figure 41 changed vs from 18v to 5v, figure 42 added rl = 2k, figure 43 added rl = 10k and corrected "hd+n" to "thd+n" on page 15, figure 44 added rl = 2k, figure 45 rl = 10k. on page 17: added figure 58 for ISL28118 on page 17, figure 58 and 59, graph upper le ft corner changed vs = 5v to vs = 15v on page 17, figure 61, deleted vs = 5v 9/16/10 fn7532.0 initial release
ISL28118, isl28218 26 fn7532.2 may 16, 2011 package outline drawing l8.3x3a 8 lead thin dual flat no-lead plastic package rev 4, 2/10 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 id entifier is optional, but must be between 0.15mm and 0.20mm from the terminal tip. dimension applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing c onform to asme y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view c 0 . 2 ref 0 . 05 max. 0 . 02 nom. 5 3.00 a b 3.00 (4x) 0.15 6 pin 1 index area pin #1 6x 0.65 1.50 0.10 8 1 8x 0.30 0.10 6 0.75 0.05 see detail "x" 0.08 0.10 c c c ( 2.90 ) (1.50) ( 8 x 0.30) ( 8x 0.50) ( 2.30) ( 1.95) 2.30 0.10 0.10 8x 0.30 0.05 a mc b 4 2x 1.950 (6x 0.65) index area pin 1 compliant to jedec mo-229 weec-2 except for the foot length. 7.
ISL28118, isl28218 27 fn7532.2 may 16, 2011 package outline drawing m8.15e 8 lead narrow body small outline plastic package rev 0, 08/09 unless otherwise specified, tolerance : decimal 0.05 the pin #1 identifier may be either a mold or mark feature. interlead flash or protrusions shall not exceed 0.25mm per side. dimension does not include interlead flash or protrusions. dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: detail "a" side view ?a typical recommended land pattern top view a b 4 4 0.25 a mc b c 0.10 c 5 id mark pin no.1 (0.35) x 45 seating plane gauge plane 0.25 (5.40) (1.50) 4.90 0.10 3.90 0.10 1.27 0.43 0.076 0.63 0.23 4 4 detail "a" 0.22 0.03 0.175 0.075 1.45 0.1 1.75 max (1.27) (0.60) 6.0 0.20 reference to jedec ms-012. 6. side view ?b?
ISL28118, isl28218 28 fn7532.2 may 16, 2011 package outline drawing m8.118 8 lead mini small outline plastic package rev 3, 3/10 detail "x" side view 2 typical recommended land pattern top view pin# 1 id 0.25 - 0.036 detail "x" 0.10 0.05 (4.40) (3.00) (5.80) h c 1.10 max 0.09 - 0.20 33 gauge plane 0.25 0.95 ref 0.55 0.15 b 0.08 c a-b d 3.00.05 12 8 0.85010 seating plane a 0.65 bsc 3.00.05 4.90.15 (0.40) (1.40) (0.65) d 5 5 side view 1 dimensioning and tolerancing conform to jedec mo-187-aa plastic interlead protrusions of 0.15mm max per side are not dimensions in ( ) are for reference only. dimensions are measured at datum plane "h". plastic or metal protrusions of 0.15mm max per side are not dimensions are in millimeters. 3. 4. 5. 6. notes: 1. 2. and amsey14.5m-1994. included. included. 0.10 c m

▲Up To Search▲

Price & Availability of ISL28118

	To Download ISL28118 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .